Beat 01
Perception layer
Vision and sensor fusion reads Mura, sub-pixel opens and shorts, particles, overlay and Vth maps as one picture of the panel rather than as separate tool alarms.
Platform
One orchestrator, seven fab-edge agents and a panel-and-line twin, wired into the tools, inspection systems and MES you already run.
Designed with the constraints of high-volume panel lines
Architecture
Beat 01
Vision and sensor fusion reads Mura, sub-pixel opens and shorts, particles, overlay and Vth maps as one picture of the panel rather than as separate tool alarms.
Beat 02
Agents reason inside their process domain; the orchestrator sequences them so upstream actions are made with downstream consequences in view.
Beat 03
Recipe and setpoint write-back, transfer and repair instructions, robotic handling moves and bin decisions — all through governed fab interfaces.
Beat 04
The twin validates before the run, the audit log records after it, and the autonomy gates decide how much the loop is allowed to do without a human.
# closed loop, one panel
perceive substrate → tft → emitter stack → sub-pixel
plan deposition · anneal · transfer · test/bin
act recipe write-back (SECS-GEM)
sense mura ΔL* · sub-pixel opens · particles
optimise yield · ramp · scrap
log immutable audit entry ✓ signed
retrain engineer correction → model
The loop
The same seven stages run whether the fab is in shadow mode or graduated autonomy. What changes is who signs off.
Step 1 of 7 · perceive
Substrate, TFT array, emitter stack and individual sub-pixels are modelled together, so a signal on one layer is read in the context of every layer beneath it.
Step 2 of 7 · plan
The orchestrator plans deposition, anneal, transfer, test and bin actions against the current yield, demand mix and risk budget — not against a static recipe table.
Step 3 of 7 · act
Recipe and setpoint write-back travels over SECS-GEM/HSMS where the tool supports it, with REST and OPC-UA bridges elsewhere. Nothing bypasses fab governance.
Step 4 of 7 · sense
Mura ΔL*, sub-pixel opens and shorts, particles, overlay and Vth maps come back as measurement, closing the loop on the action rather than assuming it worked.
Step 5 of 7 · optimise
Single-metric optimisation is how fabs trade one loss for another. The loop weighs yield, ramp time and scrap as one objective.
Step 6 of 7 · log
Each action writes a signed, yield- and quality-grade audit entry: what was sensed, what was decided, who approved it and what changed.
Step 7 of 7 · retrain
Every override is a label. Corrections from process, yield and quality engineers flow back into the models that made the call.
Capabilities
Every capability is measured against a number the fab already reports.
Sense, decide, act and verify inside the process window instead of reacting at final test.
Sub-pixel resolution understanding of what is actually wrong and where it came from.
Simulate the recipe change before it touches glass.
Improvements travel across deployments; process IP does not.
Excursions ranked by cost, not by alarm severity.
Every decision is reconstructable for quality and customer audits.
The stack
Emiteon builds on accelerated-computing frameworks rather than reinventing them, and adds the fab-specific runtime, models and governance on top.
| Layer | Responsibility | Foundation |
|---|---|---|
| Perception | Vision and sensor fusion for Mura, sub-pixel, particle and overlay signals | NVIDIA Metropolis, Holoscan |
| Robotics and handling | Panel and cassette movement, transfer heads, repair stations | NVIDIA Isaac |
| Simulation and twin | Panel-and-line digital twin for pre-run validation | NVIDIA Omniverse |
| Scheduling and routing | Bin, route and repair-queue optimisation at fab scale | NVIDIA cuOpt |
| Fab edge runtime | Deterministic, offline-capable execution beside the tools | Emiteon fab edge |
| Model management | Versioning, rollout, rollback and fleet learning | Emiteon control plane |
Fab edge
The runtime executes beside the tools. Agent steps are idempotent, every control path has a fail-safe stop, and losing the control plane degrades autonomy instead of stranding the line.
# fab-edge health
runtime running uptime 41d 06:12
control-plane unreachable since 00:04:21
autonomy graduated → advisory (auto-degrade)
queued-writes 0 (idempotent, replay-safe)
fail-safe armed handling → known-good state
Governance
Every action carries provenance. The audit log is immutable and yield- and quality-grade, so a customer audit or a field return can be traced back to the decisions that produced the panel.
# closed loop, one panel
perceive substrate → tft → emitter stack → sub-pixel
plan deposition · anneal · transfer · test/bin
act recipe write-back (SECS-GEM)
sense mura ΔL* · sub-pixel opens · particles
optimise yield · ramp · scrap
log immutable audit entry ✓ signed
retrain engineer correction → model
Integrations
Deployment
A typical design-partner path. Timelines move with tool access and data readiness.
Connectors stood up on the wedge tool stack; historical inspection and process data ingested for baseline.
Agents predict with zero write-back while accuracy is measured against your own true-versus-false-call labels.
Recommendations surface in the review console; engineers approve, override and correct, and every correction trains the models.
Low-risk deposition, anneal and transfer control released once measured accuracy and twin validation clear the bar.
Voices from the line
“We do not lose panels because nobody is watching. We lose them because the signal that mattered was buried under a thousand nuisance calls.”
“Ramp is the whole game. If a new product takes two quarters of manual tuning, that is two quarters of margin we never get back.”
“Transfer yield is our ceiling on microLED. Every dead emitter is a repair cycle or a scrapped backplane.”
Quotes are illustrative composites drawn from discovery interviews with process-integration, yield and quality engineers. Named references are [PLACEHOLDER] pending design-partner consent.
The economics
Emiteon is priced and evaluated on the numbers a fab already reports. These are design-partner targets for the first twelve months of deployment.
Figures marked as targets are design-partner objectives, not audited results. Company operating status, customers and outcomes are [ASPIRATIONAL] until independently verified.
FAQ
Through three gates. Shadow mode observes and predicts with no write-back; advisory mode recommends recipe, transfer and binning moves that a process-integration or yield engineer approves; graduated autonomy releases low-risk deposition, anneal and transfer control once measured accuracy and twin validation clear the bar. High-impact decisions stay human-in-the-loop.
Reducing false calls is the wedge, not a side effect. The mura-and-defect agent is trained on true-versus-false-call labels from your own inspection history, so it separates genuine large-area non-uniformity, sub-pixel opens and shorts, particles and stains from nuisance signals, and every call is traceable to the evidence behind it.
Per-tenant isolation with recipes, panel designs and defect images scoped to your tenant, encryption in transit and at rest, SSO/RBAC, an immutable yield/quality-grade audit log and an on-prem or air-gapped option. Fleet learning shares model improvements, never your recipes.
Deposition, photolithography, encapsulation and anneal tools, Mura/AOI inspection and metrology, array and cell test, mass-transfer and repair stations, robotic handling and MES — vendor-neutral via SECS-GEM/HSMS where the tool supports it, with REST and OPC-UA bridges elsewhere.
Every pixel, perfectly uniform.
We start where your losses are, not where our demo is easiest.