Beat 01
Perception on real panels
Train and evaluate models on inspection imagery and metrology from production lines, where the labels are noisy and the cost of a false negative is a shipped defect.
Careers
Build the loop that makes every pixel uniform
Perception, control, robotics, simulation and the fab-edge runtime — plus the field engineering that makes any of it real on a line.
- Remote-friendly
- Fab-adjacent
- Early team
The environments you will work in
Gen-8.6 OLED fabFlexible OLED module lineAutomotive display makermicroLED pilot lineAR/VR microdisplay groupLTPS array fab
The work
What you would actually do
Beat 02
Control that touches equipment
Write-back over SECS-GEM with fail-safe paths — software where correctness is not a nice-to-have.
Beat 03
Simulation that has to be right
A digital twin that gates a real recipe change is only useful if its predictions survive contact with glass.
Beat 04
Field engineering
Commissioning connectors on a live line, in a cleanroom, with equipment engineers watching. This is where the product is really designed.
# closed loop, one panel
perceive substrate → tft → emitter stack → sub-pixel
plan deposition · anneal · transfer · test/bin
act recipe write-back (SECS-GEM)
sense mura ΔL* · sub-pixel opens · particles
optimise yield · ramp · scrap
log immutable audit entry ✓ signed
retrain engineer correction → model
Open roles
Where we are hiring
Senior ML Engineer — Perception
Mura, sub-pixel and particle classification on production imagery
Control Systems Engineer
Closed-loop deposition and anneal control with fail-safe write-back
Robotics Engineer
Panel handling, transfer and repair coordination
Simulation Engineer — Digital Twin
Panel-and-line twin validation before the run
Edge Platform Engineer
Offline-capable runtime, model management and audit durability
Field Applications Engineer — Display
Commissioning, baselining and design-partner delivery
Process Integration Specialist
OLED/LTPS/microLED domain expertise in the product loop
Security Engineer
Tenant isolation, air-gapped deployment and customer security review
Hiring
How the process runs
Short, honest and the same for everyone.
Step 1 of 6 · intro
Intro conversation
What you want to work on and what we are actually doing.
Step 2 of 6 · depth
Technical depth
A conversation about work you have done, not a puzzle.
Step 3 of 6 · practical
Practical exercise
Scoped, paid where it takes real time, relevant to the role.
Step 4 of 6 · team
Meet the team
The people you would work with day to day.
Step 5 of 6 · domain
Domain conversation
With someone who has run or supported a line.
Step 6 of 6 · offer
Offer
Written, with the reasoning behind the level and the equity.
How we work
The environment
Small and senior
Few people, wide scope, direct ownership.
Written first
Proposals are written and challenged before they are built.
Close to the floor
Everyone spends time in a fab. Nobody designs a console from memory.
Remote-friendly
With travel to design-partner sites where the work demands it.
Real responsibility
Software that writes recipes carries real consequences. We staff for it.
Long-horizon equity
Meaningful ownership on a realistic vesting schedule.
Who fits
What we look for
People who are comfortable with hard physical constraints, noisy labels and customers who will not take a claim on faith. Display and semiconductor experience helps, but curiosity about the physics matters more.
- Comfort with ambiguity and real-world data
- Instinct for safety and failure modes
- Willingness to be wrong in writing
- Respect for the engineers on the line
# closed loop, one panel
perceive substrate → tft → emitter stack → sub-pixel
plan deposition · anneal · transfer · test/bin
act recipe write-back (SECS-GEM)
sense mura ΔL* · sub-pixel opens · particles
optimise yield · ramp · scrap
log immutable audit entry ✓ signed
retrain engineer correction → model
Benefits
What we offer
Details vary by location and are confirmed in writing with any offer.
| Area | What it means |
|---|---|
| Compensation | Competitive base with meaningful equity |
| Health | Medical, dental and vision cover for you and dependants |
| Time off | Generous leave with a minimum, not just a maximum |
| Equipment | Whatever you need, including cleanroom-appropriate kit |
| Learning | Conference and training budget, weighted toward display and process engineering |
| Travel | Design-partner site visits, supported properly |
Careers FAQ
Questions candidates ask
It helps, especially for domain and field roles. For perception, control and platform roles we care more about rigour with messy real-world data.
Remote-friendly with travel to design-partner fabs. Field roles are located near the lines they support.
If it takes more than a couple of hours, yes.
Early. Design-partner stage, with company status and metrics on this site labelled as aspirational until verified. Join accordingly.
Voices from the line
What the fab floor tells us
“We do not lose panels because nobody is watching. We lose them because the signal that mattered was buried under a thousand nuisance calls.”
“Ramp is the whole game. If a new product takes two quarters of manual tuning, that is two quarters of margin we never get back.”
“Transfer yield is our ceiling on microLED. Every dead emitter is a repair cycle or a scrapped backplane.”
Quotes are illustrative composites drawn from discovery interviews with process-integration, yield and quality engineers. Named references are [PLACEHOLDER] pending design-partner consent.
The economics
What the loop is measured on
Emiteon is priced and evaluated on the numbers a fab already reports. These are design-partner targets for the first twelve months of deployment.
$26BDisplay-fab automation, process control, inspection, test and fab software market
~14%Annual growth in the segments Emiteon plays in
135%Net revenue retention target from land-and-expand
99.9%Uptime target for the fab edge runtime
Figures marked as targets are design-partner objectives, not audited results. Company operating status, customers and outcomes are [ASPIRATIONAL] until independently verified.
FAQ
Questions fabs ask first
Through three gates. Shadow mode observes and predicts with no write-back; advisory mode recommends recipe, transfer and binning moves that a process-integration or yield engineer approves; graduated autonomy releases low-risk deposition, anneal and transfer control once measured accuracy and twin validation clear the bar. High-impact decisions stay human-in-the-loop.
Reducing false calls is the wedge, not a side effect. The mura-and-defect agent is trained on true-versus-false-call labels from your own inspection history, so it separates genuine large-area non-uniformity, sub-pixel opens and shorts, particles and stains from nuisance signals, and every call is traceable to the evidence behind it.
Per-tenant isolation with recipes, panel designs and defect images scoped to your tenant, encryption in transit and at rest, SSO/RBAC, an immutable yield/quality-grade audit log and an on-prem or air-gapped option. Fleet learning shares model improvements, never your recipes.
Deposition, photolithography, encapsulation and anneal tools, Mura/AOI inspection and metrology, array and cell test, mass-transfer and repair stations, robotic handling and MES — vendor-neutral via SECS-GEM/HSMS where the tool supports it, with REST and OPC-UA bridges elsewhere.
Every pixel, perfectly uniform.
Tell us what you want to work on
If none of the open roles fit but the problem does, write to us anyway.